In the manufacture of ultra large scale integration (ULSI) circuit devices, DRAM (dynamic random access memory) and FRAM (ferroelectric random access memory) chips have become increasingly dense. As density increases, feature size shrinks, and so too does memory cell size. The capacitors that are an integral part of memory cells must therefore take up a minimum of space (i.e. have a small "footprint") and still be capable of storing large amounts of electrical charge (i.e. a capacitance on the order of 30 Ff).
Capacitance is a function of dielectric area and the dielectric constant of the dielectric material, and is inversely proportional to the thickness of the dielectric. Thus one method of achieving increased capacitance in a smaller area is to use materials with higher dielectric constants as dielectrics. However, the use of high dielectric constant materials presents a problem when using traditional materials like silicon as an electrode. The silicon can react with the high dielectric constant material or oxidize during deposition of the high dielectric constant material and form an interface layer of silicon dioxide, which reduces the effective dielectric constant of the dielectric material.
Deposition temperature and leakage are other problems involved in high dielectric constant materials. Because they must be deposited at relatively high temperatures, the first-deposited electrode is formed from a high melting point conductive material which does not oxidize or react with the dielectric. In addition, the electrode material should have a large work function to increase the height of the Schottky barrier. Platinum (Pt) and other similar materials are suitable for use as electrodes in this situation. However, these electrode materials are typically difficult to pattern using conventional processes. For example, using reactive ion etching (RIE) to pattern Pt results in sloped sidewalls which, given a thick layer, can result in a significant reduction of available surface area on which to form the capacitor. Additionally, while high dielectric constant materials must be isolated from silicon, a good connection must be formed between the capacitor and the semiconductor circuit elements in the substrate.
Thus, there remains a need for a capacitor which can be produced using high dielectric constant materials yet avoids the problems associated with a reduction in the effectiveness of the finished structure.